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Daqarta for DOS
Data AcQuisition And Real-Time Analysis
Shareware for Legacy Systems

From the Daqarta for DOS Help system:



The Data Translation DT2821-series boards are classic "legacy" designs. While expensive for new installations, they remain outstanding performers. The compatible DT21-EZ series offers many of the same performance options at substantially reduced prices. This single DT2821.ADC Daqarta driver accomodates all of these models via the M: Model parameter.

Daqarta also allows full simultaneous ADC and DAC operation, not possible with ordinary software using Data Translation drivers (except perhaps the DT21-EZ). Better yet, the DACs may be run at multiples of the ADC sample rate for improved waveform resolution... even when the DAC rate is well above the limits of the ADC ("hypersampling"). And Daqarta only needs a single DMA channel for everything, whereas other applications typically require two just for ADC operation alone.


                M:      ADC        Inputs       DACs
 Model        Param   Bits kHz   SE  DI Rng   Bits kHz
DT2821        21      12    50   16   8  H    12   130
  -F-16SE     21FS    12   150   16   -  H2   12   130
  -F-8DI      21FD    12   150   -    8  H2   12   130
  -G-16SE     21GS    12   250   16   -  H2   12   130
  -G-8DI      21GD    12   250   -    8  H2   12   130
DT2823        23      16   100   -    4  1*   16   100
DT2824-PGH    24H     12    50   16   8  H    --   ---
DT2824-PGL    24L     12    50   16   8  L    --   ---
DT2825        25      12    50   16   8  L    12   130
DT2827        27      16   100   -    4  1*   12   130
DT2828        28      12   100    4   -  1    12   130
DT2829        29      16    30    8   -  1*   16   100
DT21-EZ       21EZ    12   100   16   8  H    12   130
DT23-EZ       23EZ    16   100   16   8  H    --   ---
DT24-EZ       24EZ    12   100   16   8  H    --   ---
DT24-EZ-PGL   24EZL   12   100   16   8  L2   --   ---
SE = Single-Ended input channels, DI = Differential. Models listed as 16SE/8DI use jumpers to select mode.

Rng = input ranges available:

  • H = +/- 1.25, 2.5, 5.0, 10 Volts full-scale.
  • H2 = Optional jumper for +/- 0.625, 1.25, 2.5, 5.0 Vfs.
  • L = +/- 0.02, 0.1, 1.0, 10 Volts full-scale.
  • L2 = Optional jumper for +/- 0.01, 0.05, 0.50, 5.0 Vfs.
  • 1 = +/- 10 Volts full-scale.
All models except those with a * also allow unipolar range operation via a jumper selection. (Unipolar ranges are not recommended for use with Daqarta, but may be needed for compatibility with other software.)

All models have 16 lines of digital I/O, as two ports of 8 bits each. Daqarta uses one port for input and one for output, selectable via the P: Port parameter.

Daqarta uses the on-board pacer to control sample rates, from beyond the upper limits of the board to below 0.5 Hz. Support is also provided for an external pacer connection, allowing control of the sample rate by other equipment for special applications like machine vibration harmonic analysis.


The manufacturer's speed ratings shown above may be quite conservative. The ADC on the (rather old) DT2821 used for driver development typically ran very well up to 80 kHz, and the DACs up to 200 kHz during simultaneous ADC operation:

       SYSTEM:     386DX-40        200MMX

                 ADC     DAC     ADC     DAC
 MODE:           kHz     kHz     kHz     kHz

 Sequential,     80  x1   80     80  x1   80
 Single DAC      80  x2  160     80  x2  160
                 50  x4  200     50  x4  200

 Sequential,     80  x1   80     80  x1   80
 Stereo DACs     80  x2  160     80  x2  160
                 50  x4  200   * 40  x4  160

 RTime,          70  x1   70     80  x1   80
 Single DAC      30  x2   60     60  x2  120
                 15  x4   60     30  x4  120

 RTime,          65  x1   65     80  x1   80
 Stereo DACs     30  x2   60     50  x2  100
                 15  x4   60     25  x4  100
Stimulus Factors (x1, x2, x4) indicate the DAC speed relative to the ADC. For example, if the ADC runs at 80 kHz and the Factor is x2, then the DAC or DACs are running at 160 kHz. At each 6.25 microsecond sample period (1 / 160000 second) one or both DACs are updated, while the ADC is sampled only every other period or 12.5 microseconds (1 / 80000 second). This unique mode of operation allows DAC rates to be higher than the maximum ADC rate ("hypersampling").

The table was generated by increasing the sample rate at each Factor setting until distortion was detectable on either the DAC outputs or ADC input (monitoring the output). The rate was then reduced until no distortion could be detected, and rounded down to the next lowest 5 kHz for reporting.

It was necessary to use the S: Speed parameter to tell Daqarta to ignore the default speed limits derived from the manufacturer's specs. The minimum ADC sample period was set to 12 microseconds (83 kHz) via S:A12, and S:D5 set the minimum DAC period to 5 microseconds (200 kHz).

Sequential mode refers to non-RTime operation. The ADC and DACs are only active during each acquisition sweep and are off during processing and display between sweeps. This mode is typically used for tone-burst presentations. ADC and DAC operation during a sweep is fully simultaneous and synchronous on a sample-by-sample basis as described above.

RTime mode is typically used for continuous-tone presentations where the ADC and DAC operation cannot stop for processing and display, but goes on continuously in the background. Since the DT2821-series boards don't have two independent DMA channels (nor two independent pacer systems to allow different ADC and DAC sample rates), the processor must be interrupted at the higher DAC rate. At each interrupt, the current state of the interrupted task must be saved before any data can be acquired from the ADC or output to the DACs, and that task must be restored to normal operation at the end of interrupt.

This extra interrupt overhead results in reduced throughput compared to Sequential mode, where the full resources of the CPU are dedicated to uninterrupted sampling. On the slower 386DX-40 system the interrupts consume so much time that at high sample rates there is not enough time between them for processing and display of data at an acceptable screen update rate.

The faster 200MMX system has less problems in this regard, and in fact reaches its limits in a different manner: A CPU instruction may not be interrupted once begun, so at higher sample rates an occasional slow-executing instruction (like a video bus-access) can throw off the timing enough to cause distortion "glitches" in the ADC and DAC data.

In addition, ISA bus access on the this particular 200MMX test system is actually about 16% SLOWER than on the particular 386DX-40 system. This shows up in Sequential mode with stereo DACs, where the "slower" system outperforms the "faster" one (marked with an asterisk) at x4 Factor. (Your mileage may vary.)

You can download the SYSTEST utility from the Daqarta Website to check on bus access times for your system. The 16% difference noted above was measured with 16-bit writes directly to DT2821 registers using a special test program. SYSTEST reports 8-bit read and write times for the LPT 1 printer and other built-in I/O by default, since it is designed for use on any system. You can specify a port address and 16-bit access (use SYSTEST ? to see how), but the defaults are probably adequate for system comparisons.

For the systems above, the LPT 1 access times were:

                386DX-40        200MMX

     Read:      1107 nsec       1559 nsec
     Write:      910            1443
Since overall performance is affected by both CPU speed and I/O access times, results on any given system are difficult to predict. If I/O access appears to be limiting your system, check to see if your BIOS setup allows you to change the number of wait states added to ISA operations. Sometimes the default is set to a high value just to be conservative, in order to accomodate really old boards from the 4.77 MHz days of the original PC/XT. You may want to experiment with reducing this value.

Note that simultaneous DAC and ADC operation requires intensive I/O activity while maintaining careful control over timing. Network activity causes severe problems with this and should be avoided. See the Network Incompatibility section for a simple dual-configuration batch file system that avoids loading network drivers during Daqarta sessions.

When no DACs are active, ADC sampling uses DMA transfers instead of interrupts on each sample. Sample rate is then limited only by the performance of the ADC itself.


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