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Daqarta for DOS
Data AcQuisition And Real-Time Analysis
Shareware for Legacy Systems
(Use Daqarta for Windows with modern systems)

From the Daqarta for DOS Help system:



In order to take advantage of the "miracle of dither", you need to be able to perform waveform averaging. That requires that the signal be repetitive, and that you can obtain or create a digital pulse or other signal to trigger the start of each sweep.

Depending on the exact nature of your experiment, the trigger Source could be set to Extern to use the "sync" output from an external oscillator that is providing a stimulus, or to Pulse to use the Pulse output from the LPTX driver which is initiating an external stimulus, or it could be set to Stim to use the built-in sync to the STIM3 Stimulus Generator.

The dither technique requires that the signal have a noise level at least as large as the least significant bit. With an 8-bit SAR or MUX model, this would mean noise at 1/256 of the full-scale range. Waveform averaging can then double the resolution (equivalent to adding one bit) for every doubling of the number of sweeps averaged. The 8-bit board thus gives approximate 12-bit resolution by averaging only 16 sweeps, or 16-bit resolution with 256 sweeps.


The most amazing dither application uses a single digital input on the DigOut or DAC model... essentially a single-bit ADC. The digital input allows the sample rate to be be much higher than for a typical ADC, even on a fairly slow system... over 90 kHz on a 12 MHz 286, for instance, and up to 170 kHz with a 200 MHz Pentium. (See the Performance Table.)

Again, the input noise must be as large as the least significant bit... but here that's the only bit, so the noise level must be as large as the signal itself! There are plenty of real-world signals that qualify for this dubious distinction, especially biological potentials like evoked responses.

The total level should be within the range of the digital input, namely 0 to 5 Volts, though the logic gates of most ports can withstand voltages moderately outside this range since the input resistors used here will limit input currents. An offset voltage must typically be supplied, such that the digital input sits at its threshold voltage when no signal is present.

The basic idea is that the digital input will toggle high or low when the signal (including noise) goes above or below zero. When the signal portion is at zero, the noise (which has an average value of zero) will toggle the input such that on about half of the samples it is high and half low. The averager will thus yield a mid-scale point when the signal is zero. As the signal rises above zero, the digital input will be above threshold a greater proportion of the time and thus the average will rise as well.

In other words, the noise causes duty-cycle modulation, which is averaged to recover the signal.

Instead of an offset voltage adjustment to match the digital input threshold, a separate comparator circuit could be used to set the effective threshold to zero. The comparator output is high when the input is positive, and low when it is negative.

With no averaging, the instantaneous waveform will be a blur of digital peak-to-peak toggles. But averaging 256 sweeps will now give results similar to those from an 8-bit ADC, and 4096 sweeps will give 12-bit performance.

To aid in initial setup of levels and offset voltages, use a small amount (32 sweeps) of exponential averaging to get a nearly real-time display. It will be very noisy, but will show general waveforms, levels, and offset. Then switch the averager to true mode once everything is properly adjusted.

If the noise level isn't large enough, it may actually be worth adding noise just for this purpose. This can be via an external noise source, or via the built-in LPTX Noise mode with the DAC model. You can typically get away with an exceptionally crude DAC if this is all you are going to use it for, especially if there is some noise with your signal already.

               Vs = +5 V
 Noise             |           Ch 2
  In >-----20k-----o----------> In
                   |           (Vth)
 ADC               |
  In >-------------'

 Gnd >------------------------> Gnd
Compare this to the active SAR circuit. Here the noise source has been substituted for the DAC output, and a real resistor (20k) used instead of the DAC output impedance, but otherwise the circuit is identical, and so is the analysis.

The SAR circuit actively balances the DAC output against the ADC input to just reach the Vth threshold on each sample. Here we instead rely on the noise input to bring the sum to the Vth threshold on a proportion of samples over the duration of the average.

The Rbias resistor is used to adjust the offset, just as for the active SAR. Here, however, the +5 bias voltage can be obtained from the MUX control (pin 17), which in the MUX model goes high only to strobe the DAC output but will be held high continuously for DAC or DigOut models. (The DDisk or Averager Remote control inputs are also normally high, if you don't need them for their intended purposes.)

The required Rbias value depends not only on the exact Vth value, but also upon whether the noise source is bipolar or unipolar, as well as its level, since a unipolar source adds its own effective offset. A typical value for Rbias is around 47k, but this may vary widely depending on your exact system.

The above circuit will handle an input range of about 2.5 Volts peak-to-peak when the noise is set to 5.0 Vpp. The fact that the noise goes through a 20k resistor and the signal only goes through 10k means that they are comparable when summed at the digital input. If you use the DAC with Noise mode to provide the noise, change the 20k resistor to 10k to allow for the 10k output impedance of the DAC (assuming it uses 10k and 20k resistors).

The signal input range is controlled by the noise range. With both at zero, Rbias should bring the digital input just to threshold, so that any tiny amount of noise will toggle it continuously between high and low with about a 50% duty cycle. Increasing the noise to 5 Vpp doesn't change anything, since it is still swinging equally about the threshold value.

Now if a positive DC input signal is applied, the digital input will be above threshold a greater percent of the time. If the DC level becomes so far positive that the negative noise peaks can't ever bring the sum back down to threshold, the digital input will remain high 100% of the time. Hence a varying waveform that exceeds this level will give an average that is "clipped" to the digital high level. Negative signals behave similarly.

If the noise level is reduced, the 100% point will be reached with lower input signals. But the digital input doesn't report the actual levels, only threshold events, so it will give the same full-scale clipping level. Since full-scale is reached at a lower input level, the effective sensitivity is thus increased when the noise level is reduced.

Of course, there are limits to this. If you use very low noise levels to try to get high sensitivities, the intrinsic noise of the digital input threshold point will eventually dominate the results.

Whatever sensitivity you decide to use, you can calibrate the driver via the R: Range parameter. The default range is 5 V, but since the average is acquired from digital data the trace will normally be in the bottom half of the screen unless you activate one of the Auto Zero options.

You can also use Noise mode without a full DAC, just by connecting a single output bit (any of DB25 pins 2 to 9) to a simple R-C low-pass filter:

                          Vs = +5 V
 Noise                        |           Ch 2
 Bit >-----10k--.---10k-------o----------> In
                |             |           (Vth)
                |             |
             0.01 µF         10k
                |             |
 ADC            |             |
  In >------------------------'
 Gnd >----------^------------------------> Gnd

Here the former 20k resistor is split, with the first 10k and the 0.01 µF capacitor giving a low-pass cutoff of about 1600 Hz. Using a sample rate in the 20 kHz range or above, this insures that the irregular rectangular noise pulses from the single bit will be shaped into irregular "triangles" instead. Thus, a continuous range of values is provided for summation with the ADC input signal to reach the Vth threshold, just like an analog noise source would provide.

As sample rates rise, the peak-to-peak output of the filter is reduced, thus increasing input sensitivity. At low sample rates, the binary nature of the noise comes through the filter as individual flat-topped pulses. This causes the averaged result to be distorted, since intermediate values can't be resolved... a lower filter cutoff frequency is then required.

Instead of a noise source, another possibility is to use an external oscillator. As long as it is unsynchronized to the sample frequency, it can serve the same threshold-adjusting function. A triangular waveform works best, or a square wave filtered to make quasi-triangles as for binary noise. A sine wave can sometimes be pressed into service by increasing its level.

Using an oscillator instead of a noise source can give an averaged waveform with lower overall noise, but it depends on the precise relationship to the sample frequency. At the "wrong" frequency (or the wrong point in time as the relative phases drift), the averaged waveform may show signs of the oscillator frequency. This may appear as a "grassy" or jagged interference component. Although it can sometimes be larger than the comparable results with a noise source, it may be a better choice since it is more uniform.


If there is very little noise, such that you would not need averaging anyway with an 8-bit ADC, there is a really slick trick you can perform with the DAC model: Use a simple resistive circuit as discussed above for single-bit dither, but instead of using Noise mode, use the Stair option with Start at 0 and Stop at 255. You must be in Sequential mode, with Trigger Source set to either Extern or Pulse... you can't use Stim because it takes over the DAC output.
               Vs = +5 V
 DAC             Rbias
 Stair             |           Ch 2
 Out >-----10k-----o----------> In
                   |           (Vth)
 ADC               |
  In >-------------'

 Gnd >------------------------> Gnd
Now set the waveform averager to 256 sweeps and activate it. Sweep by sweep the final waveform is built up, and when all 256 sweeps are done you will have a perfect replica of the input wave... at least to 8-bit resolution.

This works because the DAC is supplying a bias voltage to the digital input, slowly sliding each portion of the analog waveform in turn to the exact digital threshold level. This requires that the signal be truly repetitive, without significant drift or noise during the 256 sweeps. Fortunately, this includes a large number of real-world signals, such as the response of many physical systems to a stimulus signal. It's often NOT the case for biological signals, which may have lots of noise and drift.

This same trick has been used to extend the resolution of a 12-bit laboratory ADC board to get 16-bit resolution. The signal source was a laser doppler velocimeter measuring tiny motions in a rodent ear, and via careful acoustic isolation the noise level was low enough that without this technique the averaged response showed a staircase effect due to inadequate resolution.

If there is noise present in the signal, there will be noise in the averaged waveform. That can be reduced by still more averaging, if needed. Signal drift should be eliminated by a high-pass filter before adding the DAC output.

The difference between DC dither and the more usual noise dither is that this doesn't require any noise in the signal, whether natural or added. Its main shortcoming is that it's difficult to tell much about the signal until all 256 sweeps have been averaged, since before completion the average may appear grossly distorted. With noise dither, you see the signal slowly become clearer and clearer, so it's often possible to make general judgements only partway through the average.


To understand the R-2R ladder operation, first consider a simplified 1-bit DAC version:
 MSB >---- 2R -----.-------> OUT
 Gnd >-------------^-------> Gnd
For 1 bit system, there are only 2 input states, 0 and 1. If the input is 0, then the MSB side of the top 2R resistor is effectively connected to ground, and the output will be 0 Volts. If the input state is 1, this effectively becomes a simple voltage divider which produces an output of half the digital High voltage, hereafter referred to as Vs (since with CMOS circuits it will typically equal the supply voltage).

At first you might think that the 1 state in a single-bit DAC should encode the full-scale value of Vs. But this is just like the weighting of bits on any "offset-binary" ADC or the LPTX 'All 4' digital input weighting: The maximum value is always one state less than full-scale.

Now consider a 2-bit version:

 MSB >---- 2R -----.-------> OUT
 LSB >---- 2R -----|
 Gnd >-------------^-------> Gnd
Here we have 4 possible input states: 00, 01, 10, and 11. If both inputs are 0, such that their 2R resistors are connected to ground, the output will also be zero.

Consider next the 10 state, where MSB is connected to +5 V and LSB is connected to ground. But if LSB is connected to ground, its 2R resistor will be in parallel with the other 2R resistor to ground, so their combined resistance will be half of either, or just R. And that R is in series with the one coming down from the MSB-output junction, so there is a total of 2R to ground. That makes this equivalent to the simple voltage divider seen in the 1-bit example, with an output of Vs/2.

In the 01 state, MSB is connected to ground and LSB to +5. This is harder to analyze, but it can be done in stages. If the above circuit is redrawn with the MSB section folded down to ground, we get the following:

 LSB >---- 2R -----.---------.  ... V1
                   |         |
                   |         R
                   |         |            DAC
                   2R        |----------> Out
                   |         |
                   |         2R
                   |         | (MSB)
 Gnd >-------------^---------^----------> Gnd

The first step is to find the V1 voltage, after which we can find the output from the simple voltage divider. The leg below the V1 point has a total of 3R to ground, and that is in parallel with the original 2R from the LSB to ground. The parallel combination is thus (2R × 3R) / (2R + 3R) or 6R / 5R. This forms the lower leg of the V1 woltage divider, with the upper leg equal to R2 from the LSB input. The V1 voltage would thus be
 V1  =  Vs × Rlower / (Rupper + Rlower)
     =  Vs × 6R/5R / (2R + 6R/5R)
     =  Vs × 1.2 / 3.2
     =  Vs × 0.375
which is 3/8 of Vs. Notice that the divider below V1 will give 2/3 of this value at the DAC Out point, which is 2/8 or 1/4 of Vs... just what we expect for the 01 input state.

For the 11 state a similar analysis can be conducted. But it is simpler to use the principle of superposition, which says that the overall output is the sum of all the values we would get by considering each source alone, with the others shorted. Since we just computed both of those as Vs/2 and Vs/4, we find that the combined value of 3/4 Vs is again just what we expect.

This same process can be extended to any number of bits, but solving all the branches can be quite involved. Superposition can be used more effectively by recognizing that earlier solutions with less bits can be applied to portions of the new network. For example, consider the 3-bit case:

 MSB >----- 2R -----.-------> OUT
     >----- 2R -----|
 LSB >----- 2R -----|
 Gnd >--------------^------- Gnd
If LSB is grounded, this becomes the 2-bit network we have just solved. So we know that the 100 input state will give the same Vs/2 output as the previous 10 state, and 010 will give Vs/4 as did the prior 01, and 110 the same 3/4 Vs as the prior 11 state. We thus need to solve only the 001 state to complete the analysis, since we can always add that result to the 100 and 110 states to get the 101 and 111 results.


Although power connections to the op-amps are not shown in any of these circuits, they are always needed. The actual supply voltages depend upon the type of op-amp: You can use 0 and +5 with a single-supply amp, or +9 and -9 with general-purpose amps.


  In >---Ri----.-------Rf---------.
               |   .---------.    |
               `---|-        |    |
                   | Op-Amp  |----^-----> Out
               .---|+        |
               |   `---------'  Gain =  Rf/Ri
               |                Zin = Ri
 Gnd >---------^------------------------> Gnd


                |   .---------.    |
                |---|-        |    |
                |   | Op-Amp  |----^-----> Out
  In >----.---------|+        |
          |     |   `---------'  Gain = 1 + Rf/Rg
          Ri    |
          |     Rg               Zin = Ri
          |     |
 Gnd >----^-----^------------------------> Gnd
Example: A typical SAR input range without gain is +/- 2.5 V. For a +/- 1 V range, a gain of 2.5 is needed. The resistor ratio must be 1.5, so you could use Rf = 15k and Rg = 10k.

Ri sets the input impedance, and could be omitted if a really high impedance is required. However, the op-amp requires bias current from this input, which may cause a large offset voltage if that current must be pulled through a large input (or source) resistance. To estimate the size of the offset, multiply the input bias current for the selected op-amp type times the equivalent input resistance (Ri in parallel with the source impedance).

Input gain on the LPTX board should be kept to a minimum to avoid pickup of spurious noise from the computer or the digital circuits on the LPTX board itself. It is better to use a separate microphone preamp, if needed, which can be located away from the computer.


                   |   .---------.    |
                   |---|-        |    |
                   |   | Op-Amp  |----^-----> Out
  In >---C---.---------|+        |
             |     |   `---------'  Gain = 1 + Rf/Rg
             Ri    |
             |     Rg
             |     |
 Gnd >-------^-----^------------------------> Gnd
The input capacitor C and input resistor Ri form a simple high-pass filter which has its -3 dB cutoff at:
    1 / (2 × pi × Ri × C).
For example, with Ri = 100k and C = 0.1 µF the cutoff would be at about 16 Hz.


        |                  |       |
        |   .---------.  47pF     10k
        `---|-        |    |       |
            | Op-Amp  |----^--100--^---> Out
 In >-------|+        |       ohm
This circuit is designed to drive long cables or other capacitive loads without instability. If you don't need that kind of performance, you can just connect the inverting input directly to the output and omit the capacitor and resistors.

Note that this can perform the S/H function for the MUX model simply by connecting the Hold capacitor between the + input and ground.


 Vr >----R----.--------R---------.
              |   .---------.    |
              `---|-        |    |
                  | Op-Amp  |----^-----> Out
 In >-------------|+        |
                  `---------'   Out = 2 × In - Vr

This converts 0-5V DAC outputs to +/- 5V without the use of any capacitive coupling and consequent time-constant effects. It requires dual supplies for the op-amp (such as +9V and -9V) in order to produce the negative outputs. Here Vr is the same +5V supply that is used for the DAC, but since it is directly subtracted from the output, any digital noise on it will appear on the output as well (although inverted).

The cable-driving features of the above output buffer circuit can easily be provided by making R = 10k and adding the 47 pF capacitor and 100 ohm resistor to this circuit. (Which is the same as just adding 10k to the above buffer, from +5 to the inverting op-amp input.)

Like the above buffer, this can also perform the S/H function at the non-inverting input by adding a hold capacitor there. This technique is used in the example MUX board design.


  In >--------------.
      .---------.   |
      |         |---'
      | Control |----------R--.
      |         |------.      |   .----------------.
      `---------'      |      |   |  .---------.   |
  A                    |      |   `--|-        |   |
 Gnd >-----------------|      |      | Op-Amp  |---^---> Out
                       |      |------|+        |
  B                    |      |      `---------'
  In >--------------.  |      |
      .---------.   |  |      |
      |         |---'  |      |
      | Control |----------R--|
      |         |---.  |      |
      `---------'   |  |      R
  B                 |  |      |
 Gnd >--------------^--^------^------------------------> Gnd
The two controls (potentiometers or "pots") are essentially resistors with sliding center taps. When the knob is twisted fully clockwise, the wiper contacts the upper end of the resistor which connects it directly to the input. When fully counter-clockwise, the wiper connects directly to ground. At any point in between, the control forms a voltage divider such that the output is a proportional fraction of the input.

Ideally, the R resistors should be much larger than the overall control resistance, such as 100k with 10k controls, but this is not critical. The op-amp buffer can be omitted if the output will not be loaded down too much.

With the above design, having all three R resistors equal, the maximum output will be equal to half the sum of both inputs. For most applications, the lower R to ground can be omitted to allow a larger output if care is taken to prevent overdriving the subsequent stage.

A simpler mixer for reverberation work can be made with just a single control on the feedback portion. The raw signal can be fed to the other R resistor directly.

Another variant is a "cross-fade" circuit that reduces one input while increasing the other proportionally. The R value here is non-critical.

  In >--------------.            .----------------.
                    |            |  .---------.   |
      .---------.   |            `--|-        |   |
      |         |---'               | Op-Amp  |---^---> Out
      | Control |----------.--------|+        |
      |         |---.      |        `---------'
      `---------'   |      |
  B                 |      R
  In >--------------'      |
 Common                    |
 Gnd >---------------------^--------------------------> Gnd
Typically, audio mixers use "log taper" or "audio taper" controls. These have a nonlinear resistance track to compensate for the logarithmic response of the ear to increasing loudness. If you use a standard linear taper control, the level will seem to increase rapidly at first, then hardly change at all with increasing rotation of the knob.

On the other hand, with the cross-fade circuit you really must have a linear control or one input will go down much more rapidly than the other goes up.

In all of the above mixer examples, it is assumed the the inputs are all from low impedance sources like amplifier or oscillator outputs, and that cross-modulation is not likely to be a problem. However, for critical low-level intermodulation distortion measurements you may need to have a buffer op-amp on each input so that one doesn't affect the other. This is not something you normally need to worry about.


This is a ubiquitous circuit building-block:
 Vin >-------.
             |----------> Vout
 Gnd >-------^----------> Gnd
The input is assumed to be an ideal voltage source between Vin and ground. A battery, regulated power supply, or typical op-amp or audio power amp output would be good approximations. If the source has a significant effective series resistance (output impedance), its value must be added to Ri.

The output between Vout and ground must not be loaded with any significant resistance, or its value must be considered in parallel with Rg. The parallel combination would be:

 (Rg × Rload) / (Rg + Rload)
Once these conditions are met, Vout can be computed from
 Vout = (Vin × Rg) / (Ri + Rg)
If you are designing a circuit and want to determine the values of Ri and Rg to use for a given Vin to get a certain Vout, you can rearrange this to :
 Ri = Rg × (Vin - Vout) / Vout
 Rg = Ri × Vout / (Vin - Vout)
 Ri / Rg = (Vin - Vout) / Vout


               LPTX PORT USAGE
                   .---- .
             Ch 1  |13    \
             Ch 2  |12   25|  Gnd
  Ext Trig / Ch 4  |11   24|  Gnd
 Ext Pacer / Ch 3  |10   23|  Gnd
 DAC / DigOut  D7  | 9   22|  Gnd
 DAC / DigOut  D6  | 8   21|  Gnd
 DAC / DigOut  D5  | 7   20|  Gnd
 DAC / DigOut  D4  | 6   19|  Gnd
 DAC / DigOut  D3  | 5   18|  Gnd
 DAC / DigOut  D2  | 4   17|  MUX Cntl
 DAC / DigOut  D1  | 3   16|  Pulse Output
 DAC / DigOut  D0  | 2   15|  Ch 0
     DDisk Remote  | 1   14|  Averager Remote
                   |      /
                   `---- '

            .---- .
    Select  |13    \
 Paper Out  |12   25|  Gnd
      Busy  |11   24|  Gnd
      -Ack  |10   23|  Gnd
        D7  | 9   22|  Gnd
        D6  | 8   21|  Gnd
        D5  | 7   20|  Gnd
        D4  | 6   19|  Gnd
        D3  | 5   18|  Gnd
        D2  | 4   17|  -Select Input
        D1  | 3   16|  -Init
        D0  | 2   15|  -Error
   -Strobe  | 1   14|  -Auto Feed
            |      /
            `---- '
NOTE: When an extra LPT port is used for STIM3 Digital Output (DigOut) via the P:Ln parameter, only D0 through D7 outputs (and the grounds) are used.
        8255 Parallel Port
            .---- .
       Gnd  |19    \
     + 5 V  |18   37|  PA0
       Gnd  |17   36|  PA1
    + 12 V  |16   35|  PA2
       Gnd  |15   34|  PA3
    - 12 V  |14   33|  PA4
       Gnd  |13   32|  PA5
     - 5 V  |12   31|  PA6
       Gnd  |11   30|  PA7
       PB0  |10   29|  PC0
       PB1  | 9   28|  PC1
       PB2  | 8   27|  PC2
       PB3  | 7   26|  PC3
       PB4  | 6   25|  PC4
       PB5  | 5   24|  PC5
       PB6  | 4   23|  PC6
       PB7  | 3   22|  PC7
 IR Enable  | 2   21|  Gnd
  IR Input  | 1   20|  + 5 V
            |      /
            `---- '
NOTE: Pins 1 and 2 (Interrupt Input and Enable) are not used by this driver.

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